Increasing complexity and integration, shrinking geometries and consequent physical effects have been some of the ongoing challenges Macrotech’s ultra deep sub micron flow has had to address. First-pass silicon is a critical requirement our partners are increasingly relying on to tackle an ever-shrinking product window and faster design obsolescence.

The team at Macrotech has delivered on integration of complex multimillion gate SoC designs with multiple voltage islands and multiple clock domains in nanometer technology using hierarchical place and route. All this has been accomplished while also addressing the challenges of Signal Integrity (SI) and Ultra Deep-Sub-Micron effects. Further, the team has the execution expertise on issues related to the physical effects that affect reliability and manufacturability such as Crosstalk, static and dynamic IR drop, electron migration, and antenna effects at length.

Macrotech provides the following services for Physical Design:

Product structures and the chips that go inside them are becoming increasingly complex. So, it is ever more important to identify non–functional parts very early in the product life cycle to avoid cost overruns due to de-bug support.

The tests for identifying such parts are conducted in two phases: the wafer test and the final test after assembly.

Macrotech provides the following services for design for test (DFT):